Integrated circuit switches used in 3D and other integrated circuits can be formed from solid state structures (e.g., transistors) or passive wires (MEMS). MEMS switches are typically employed because of their almost ideal isolation, which is a critical requirement for wireless radio applications where they are used for mode switching of power amplifiers (PAs) and their low insertion loss (i.e. resistance) at frequencies of 10 GHz and higher. MEMS switches can be used in a variety of applications, primarily analog and mixed signal applications. One such example is cellular telephone chips containing a power amplifier (PA) and circuitry tuned for each broadcast mode. Integrated switches on the chip would connect the PA to the appropriate circuitry so that one PA per mode is not required.
Depending on the particular application and engineering criteria, MEMS structures can come in many different forms. For example, MEMS can be realized in the form of a cantilever structure. In the cantilever structure, a cantilever arm (suspended electrode) is pulled toward a fixed electrode by application of a voltage. The voltage required to pull the suspended electrode to the fixed electrode by electrostatic force is called pull-in voltage, which is dependent on several parameters including the length of the suspended electrode, spacing or gap between the suspended and fixed electrodes, and spring constant of the suspended electrode, which is a function of the materials and their thickness.
MEMS can be manufactured in a number of ways using a number of different tools. In general, though, the methodologies and tools are used to form small structures with dimensions in the micrometer scale with switch dimensions of approximately 5 microns thick, 100 microns wide, and 200 microns long. Also, many of the methodologies, i.e., technologies, employed to manufacture MEMS have been adopted from integrated circuit (IC) technology. For example, almost all MEMS are built on wafers and are realized in thin films of materials patterned by photolithographic processes on the top of the wafer. In particular, the fabrication of MEMS uses three basic building blocks: (i) deposition of thin films of material on a substrate, (ii) applying a patterned mask on top of the films by photolithographic imaging, and (iii) etching the films selectively to the mask.
In MEMS cantilever type switches the fixed electrodes and suspended electrode are typically manufactured using a series of conventional photolithographic, etching and deposition processes. In one example, after the suspended electrode is formed, a layer of sacrificial material, e.g., the spin-on polymer PMGI made by Microchem, Inc., is deposited under the MEMS structure, to form a cavity, and over the MEMS structure to form a cavity. The cavity over the MEM is used to support the formation of a cap, e.g., SiN dome, to seal the MEMS structure. To remove the sacrificial material from within the SiN dome, vent holes are printed in the top of the dome directly above the MEMS structure. However, this poses several shortcomings.
For example, printing vent holes in the top of the dome is a difficult process due to the variability of the photoresist on the curvature on the dome, e.g., requiring printing in more than one focal plane. Once the vent holes are formed and the material, e.g., PMGI, within the dome is removed (using, for example, a downstream oxygen plasma, preferably at 125 C or greater to increase the removal rate; or a dip NMP solvent, performed in a spray or tank tool), it is necessary to seal the dome. The sealing process includes, for example, depositing another cap (SiN or silicon dioxide) over the dome and within the vent holes. During this sealing process, though, the SiN or silicon dioxide material also deposits on the suspended electrode and, in some case, the fixed electrodes. This is due to the location of the vent holes, i.e., directly over the MEMS structure. The SiN (or other material) deposited on the suspended electrode generates a dimensional variability of the suspended electrode which results in unwanted stresses and variability in the pulling voltage. The latter is due to a change, for example, in the spring constant of the suspended electrode. On the other hand, SiN (or other) material deposited on the fixed electrodes results in a higher contact resistance, also an unwanted effect of the deposition of SiN material occurring through the vent holes. The deposition of the sealing dielectric through the vent holes onto the MEMS structure can also happen if the cavity vent holes are sealed with a spin-on dielectric or polymer.
In addition, horizontal cantilever or bridge beam type switches, in many current applications, are known to stick, e.g., exhibit an inability to open the switch due to freezing closed during processing and the relatively small contact or actuation gap used in the switch. This is known as sticktion. This may be due, for example, the wet etching processes used to strip the sacrificial material from under the cap.
In general, wet release processes are simple to use, since such processes can have high lateral etch rates (higher than dry processes). However, with wet release processes, surface tension during the release process can cause the MEMS elements to stick together, resulting in failure of the MEMS. With the dry release processes, on the other hand, lateral etching of the sacrificial material is required. In dry etching processes, to fully remove the sacrificial material, lateral etching is required, often for tens of microns. This is challenging and can take about 0.1-10 hours per wafer, which is expensive. In dry release silicon methodologies, silicon is used as the sacrificial material if a XeF2 or other lateral silicon etch process is used. XeF2 etching has two drawbacks. For example, XeF2, a nuclear reaction by-product, is very expensive, e.g., to remove 5 μm of silicon through 1 μm wide slits can take greater than 1 hour per wafer and can cost more $100 per wafer. In addition, depositing silicon at temperatures compatible with BEOL wiring (i.e., <400° C.) can only be performed using PECVD or PVD. However, PECVD silicon is a challenging process to perform because it is difficult and challenging to clean the silicon from the PECVD chamber walls. Also, PVD silicon is available but is expensive due to the relatively low PVD deposition rates (<100 nm/minute). Using dry release polymer methodologies is very difficult if the lateral aspect ratio is >>1 (as it is for most applications). Using dry release SiO2-based dielectric is very difficult if the lateral aspect ratio is >>1 (as it is for most applications).
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.